From Lawrence Berkeley National Lab: “Berkeley Lab Takes a Quantum Leap in Microelectronics” Ramamoorthy Ramesh

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From Lawrence Berkeley National Lab

December 3, 2018
Julie Chao
JHChao@lbl.gov
(510) 486-6491

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(Courtesy Ramamoorthy Ramesh)
A Q&A with Ramamoorthy Ramesh on the need for next-generation computer chips

Ramamoorthy Ramesh, a Lawrence Berkeley National Laboratory (Berkeley Lab) scientist in the Materials Sciences Division, leads a major Lab research initiative called “Beyond Moore’s Law,” which aims to develop next-generation microelectronics and computing architectures.

Moore’s Law – which holds that the number of transistors on a chip will double about every two years and has held true in the industry for the last four decades – is coming to an inevitable end as physical limitations are reached. Major innovations will be required to sustain advances in computing. Working with industry leaders, Berkeley Lab’s approach spans fundamental materials discovery, materials physics, device development, algorithms, and systems architecture.

In collaboration with scientists at Intel Corp., Ramesh proposes a new memory in logic device for replacing or augmenting conventional transistors. The work is detailed in a new Nature paper described in this UC Berkeley news release [blog post will follow]. Here Ramesh discusses the need for a quantum leap in microelectronics and how Berkeley Lab plans to play a role.

Q. Why is the end of Moore’s Law such an urgent problem?

If we look around, at the macro level there are two big global phenomena happening in electronics. One is the Internet of Things. It basically means every building, every car, every manufacturing capability is going to be fully accessorized with microelectronics. So, they’re all going to be interconnected. While the exact size of this market (in terms of number of units and their dollar value) is being debated, there is agreement that it is growing rapidly.

The second big revolution is artificial intelligence/machine learning. This field is in its nascent stages and will find applications in diverse technology spaces. However, these applications are currently limited by the memory wall and the limitations imposed by the efficiency of computing. Thus, we will need more powerful chips that consume much lower energy. Driven by these emerging applications, there is the potential for the microelectronics market to grow exponentially.

Semiconductors have been progressively shrinking and becoming faster, but they are consuming more and more power. If we don’t do anything to curb their energy consumption, the total energy consumption of microelectronics will jump from 4 percent to about 20 percent of primary energy. As a point of reference, today transportation consumes 24 percent of U.S. energy, manufacturing another 24 percent, and buildings 38 percent; that’s almost 90 percent. This could become almost like transportation. So, we said, that’s a big number. We need to go to a totally new technology and reduce energy consumption by several orders of magnitude.

Q. So energy consumption is the main driver for the need for semiconductor innovation?

No, there are two other factors. One is national security. Microelectronics and computing systems are a critical part of our national security infrastructure. And the other is global competitiveness. China has been investing hundreds of billions of dollars into making these fabs. Previously only U.S. companies made them. For two years, the fastest computer in the world was built in China. So this is a strategic issue for the U.S.

Q. What is Berkeley Lab doing to address the problem?

Berkeley lab is pursuing a “co-design” framework using exemplar demonstration pathways. In our co-design framework, the four key components are: (1) computational materials discovery and device scale modeling (led by Kristin Persson and Lin-wang Wang), (2) materials synthesis and materials physics (led by Peter Fischer), (3) scale up of synthesis pathways (led by Patrick Naulleau), and (4) circuit architecture and algorithms (led by John Shalf). These components are all working together to identify the key elements of an “attojoule” (10-18 Joules) logic-in-memory switch, where attojoule refers to the energy consumption per logic operation.

One key outcome of the Berkeley Lab co-design framework is to understand the fundamental scientific issues that will impact the attojoule device, which will be about six orders of magnitude lower in energy compared to today’s state-of-the-art CMOS transistors, which work at around 50 picojoules (10-12 Joules) per logic operation.

This paper presents the key elements of a pathway by which such an attojoule switch can be designed and fabricated using magnetoelectric multiferroics and more broadly, using quantum materials. There are still scientific as well as technological challenges.

Berkeley Lab’s capabilities and facilities are well suited to tackle these challenges. We have nanoscience and x-ray facilities such as the Molecular Foundry and Advanced Light Source, big scientific instruments, which will be critical and allow us to rapidly explore new materials and understand their electronic, magnetic, and chemical properties.

Another is the Materials Project, which enables discovery of new materials using a computational approach. Plus there is our ongoing work on deep UV lithography, which is carried out under the aegis of the Center for X-Ray Optics. This provides us with a perfect framework to address how we can do device processing at large scales.

All of this will be done in collaboration with faculty and students at UC Berkeley and our partners in industry, as this paper illustrated.

Q. What is the timeline?

It will take a decade. There’s still a lot of work to be done. Your computer today operates at 3 volts. This device in the Nature paper proposes something at 100 millivolts. We need to understand the physics a lot better. That’s why a place like Berkeley Lab is so important.

See the full article here .

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